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| FDC6318P December 2001 FDC6318P Dual P-Channel 1.8V PowerTrench Specified MOSFET General Description These P-Channel 1.8V specified MOSFETs are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain low gate charge for superior switching performance. Features * -2.5 A, -12 V. RDS(ON) = 90 m @ VGS = -4.5 V RDS(ON) = 125 m @ VGS = -2.5 V RDS(ON) = 200 m @ VGS = -1.8 V * High performance trench technology for extremely low RDS(ON) * SuperSOTTM-6 package: small footprint (72% smaller than standard SO-8); low profile (1mm thick) Applications * Power management * Load switch S1 D1 D2 4 5 G2 3 2 1 SuperSOT TM -6 G1 S2 6 Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed TA=25oC unless otherwise noted Parameter Ratings -12 8 (Note 1a) Units V V A W -2.5 -7 0.96 0.9 0.7 -55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 130 60 C/W C/W Package Marking and Ordering Information Device Marking .318 Device FDC6318P Reel Size 13'' Tape width 12mm Quantity 3000 units 2001 Fairchild Semiconductor Corporation FDC6318P Rev D (W) FDC6318P Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSSF IGSSR VGS(th) VGS(th) TJ RDS(on) TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse (Note 2) Test Conditions ID = -250 A VGS = 0 V, ID = -250 A, Referenced to 25C VDS = -10 V, VGS = 8 V, VGS = -8 V, VGS = 0 V VDS = 0 V VDS = 0 V Min -12 Typ Max Units V Off Characteristics -2.9 -1 100 -100 -0.4 -0.7 2.3 69 93 135 85 -6 8 455 194 134 9 14 21 17 VDS = -6 V, VGS = -4.5 V ID = -2.5 A, 5.4 1.1 1.3 -0.8 (Note 2) mV/C A nA nA V mV/C 90 125 200 120 m On Characteristics Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance ID = -250 A VDS = VGS, ID = -250 A, Referenced to 25C VGS = -4.5 V, ID = -2.5 A VGS = -2.5 V, ID = -2 A VGS = -1.8 V, ID = -1.6 A VGS= -4.5 V, ID = -2.5A, TJ=125C VGS = -4.5 V, VDS = -5 V VDS = -5 V, ID = -2.5 A -1.5 ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS VSD On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance (Note 2) A S pF pF pF 18 25 34 31 8 ns ns ns ns nC nC nC A V Dynamic Characteristics VDS = -6 V, f = 1.0 MHz V GS = 0 V, Switching Characteristics Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge ID = -1 A, VDD = -6 V, VGS = -4.5 V, RGEN = 6 Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = -0.8 A Voltage -0.7 -1.2 Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 130 C/W when mounted on a 0.125 in2 pad of 2 oz. copper. b) 140C/W when mounted 2 on a .004 in pad of 2 oz copper c) 180C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDC6318P Rev D (W) FDC6318P Typical Characteristics 10 VGS=-4.5V -3.0V 2.2 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -2.5V VGS = -1.8V 2 1.8 1.6 1.4 1.2 1 0.8 -ID, DRAIN CURRENT (A) 8 -2.0V 6 -2.0V -1.8V 4 -2.5V -3.0V -3.5V -4.5V -1.5V 2 0 0 1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 2 4 6 8 10 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.26 RDS(ON), ON-RESISTANCE (OHM) 1.3 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = -2.5A VGS = -4.5V ID = -1.5A 0.2 1.2 1.1 TA = 125oC 0.14 1 TA = 25oC 0.08 0.9 0.8 -50 -25 0 25 50 75 100 o 0.02 125 150 1 2 3 4 5 TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. 8 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 -IS, REVERSE DRAIN CURRENT (A) VDS = -5V -ID, DRAIN CURRENT (A) 6 TA = -55oC 25oC 125oC VGS = 0V 1 TA = 125oC 0.1 4 25oC -55oC 2 0.01 0 0.5 1 1.5 2 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.001 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC6318P Rev D (W) FDC6318P Typical Characteristics 5 -VGS, GATE-SOURCE VOLTAGE (V) 800 ID = -2.5A 4 VDS = -4V -6V CAPACITANCE (pF) f = 1 MHz VGS = 0 V 600 -8V 3 CISS 400 2 COSS 200 1 CRSS 0 0 2 4 Qg, GATE CHARGE (nC) 6 8 0 3 6 9 12 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 8. Capacitance Characteristics. 20 -ID, DRAIN CURRENT (A) 10 RDS(ON) LIMIT 100s 1ms 10ms 100ms 1s DC 15 SINGLE PULSE RJA = 130C/W TA = 25C 1 VGS = -4.5V SINGLE PULSE RJA = 130oC/W TA = 25oC 0.01 0.1 1 10 0.1 5 10 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 130oC/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.00001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDC6318P Rev D (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R) SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R) VCXTM STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 |
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